- Role: Physical Design Engineer
- Company: Qualcomm
- Location: Chennai
- Qualifications: Any Graduate, Any Postgraduate
- Experience: 2 – 10 Years
- Employment Type: Full Time, Permanent
Job Summary:-
Qualcomm Technologies, Inc., a pacesetter in the semiconductor industry, is searching for a professional Physical Design Engineer to join their institution in Chennai. This position consists of running at the physical implementation of sub-structures, in conjunction with essential duties like floor-making plans, location and direction (PnR), clock tree synthesis (CTS), and timing closure. The perfect candidate could have experience in bodily format for immoderate-frequency facts-route in-depth cores, with a strong recognition of usual performance, strength, and area (PPA) optimization.
Physical Design Engineer Key Responsibilities:-
1. Physical Implementation:
- Oversee the bodily implementation of sports for sub-systems, making sure green ground planning and region and course techniques.
- Work on clock tree synthesis (CTS) and formal verification, making sure the layout meets all practical and timing requirements.
2. Verification and Optimization:
- Perform physical verification, including Design Rule Check (DRC) and Layout Versus Schematic (LVS) to ensure layout integrity.
- Manage electricity distribution network (PDN) design and optimization, aiming for green electricity transport and minimal noise.
3. Timing Closure:
- Focus on timing convergence for high-frequency information-route extensive cores.
- Utilize advanced Static Timing Analysis (STA) thoughts and gear like Synopsys ICC2, Cadence Innova, PTSI, and Tempus for ensuring accurate timing closure.
4. Collaboration and Problem-Solving:
- Collaborate cautiously with layout, Design for Test (DFT), and PnR groups to solve issues associated with constraints validation, verification, and STA.
- Apply sturdy hassle-fixing competencies to address technical traumatic situations and streamline mission workflows.
5. Scripting and Automation:
- Utilize Tcl/Perl scripting to automate repetitive responsibilities and beautify workflow overall performance.
Minimum Qualifications:
- Bachelor’s, Master’s, or Ph.D. Degree in Computer Science, Electrical/Electronics Engineering, or a related area from a reputed company.
Experience:
- 2-10 years of experience in physical design or implementation.
- Experience with hardware engineering or a related field is important, with at least three years of hands-on experience for Bachelor’s diploma holders, 2 years for Master’s, and 1 12 months for a Ph.D. Holders.
Technical Skills:
- Strong knowledge of PPA optimization and trade-offs.
- Proficiency in physical layout tools which include Synopsys ICC2, Cadence Innovus, and timing assessment gear like PTSI/Tempus.
- Good information on the clocking structure and bodily verification methodologies.
Soft Skills:
- Excellent problem-solving competencies and communication capabilities.
- Experience operating in collaborative group surroundings, assembly undertaking milestones, and ultimate dates.
Company Overview:-
Qualcomm Technologies, Inc. Is a worldwide chief in the development and commercialization of foundational generation for the wireless industry. The organization has a robust recognition for innovation and is at the leading edge of advancements in semiconductor and telecommunications generation. The decided-on candidate can have the opportunity to work in dynamic and hard surroundings, contributing to contemporary tasks that form the future of technology.
Application Information:
This position offers a complete-time, everlasting feature primarily based in Chennai, with competitive compensation and blessings. Interested candidates should have a stable foundation in electrical or electronics engineering, strong technical abilities, and a passion for hardware engineering. This position is good for individuals looking to develop their careers in a prime technology business enterprise and artwork on today’s initiatives.
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